ChipEspressif

ESP32-S3

Espressif ESP32-S3 SoC family: dual LX7 cores, 2.4 GHz Wi-Fi + BLE and native USB in the chip; what depends on the module and board, and how to start developing.

The ESP32-S3 is Espressif's SoC family for embedded applications: two 32-bit Xtensa LX7 application cores, a 2.4 GHz radio (Wi-Fi and Bluetooth Low Energy) and native USB, all integrated in the chip. In MCUID's hardware chain — chip → module → board — this page describes what the chip family provides; the pins, connectors and flash capacity you can actually use are decided one level down, by the module and the board you choose.

Start from a board: ESP32-S3-DevKitC-1 — the board this site documents for the chip; related Q&A: Feather ESP32-S3 SKU picker, AtomS3 GPIO budget. Official entry: ESP-IDF ESP32-S3 get started.

Capabilities — what the chip family provides

Each row is one capability: the official wording, what it means in development, and the source. The scope is the ESP32-S3 SoC itself. Clock frequency, SRAM size and wireless protocol versions are datasheet numbers; the table sticks to what the cited overview states.

Capabilities

CapabilityWhat the sources saySource
Dual-core Xtensa 32-bit LX7 CPU“Dual high performance Xtensa® 32-bit LX7 CPU cores” (official wording). Your application code runs on two identical 32-bit cores. The clock frequency is a datasheet number and is not quoted here.ESP-IDF v6.1 Get Started — ESP32 / ESP32-S3 chip overview · docs/en/get-started/index.rst
2.4 GHz Wi-Fi“Wi-Fi (2.4 GHz band)” (official wording). The radio is integrated in the SoC — no external Wi-Fi module. Protocol-version details belong to the datasheet.ESP-IDF v6.1 Get Started — ESP32 / ESP32-S3 chip overview · docs/en/get-started/index.rst
Bluetooth Low Energy“Bluetooth Low Energy” (official wording). BLE on-chip. The same source list does not mention classic Bluetooth for this chip.ESP-IDF v6.1 Get Started — ESP32 / ESP32-S3 chip overview · docs/en/get-started/index.rst
USB OTG interface“USB OTG interface” (official wording). A native USB peripheral. Whether your board wires it to a USB connector is a board fact, not a chip fact.ESP-IDF v6.1 Get Started — ESP32 / ESP32-S3 chip overview · docs/en/get-started/index.rst
USB Serial/JTAG controller“USB Serial/JTAG Controller” (official wording). Built-in flashing and debugging over USB, independent of any external USB-to-UART bridge; a board still decides which connectors exist.ESP-IDF v6.1 Get Started — ESP32 / ESP32-S3 chip overview · docs/en/get-started/index.rst
Ultra-low-power coprocessor“Ultra Low Power co-processor running either RISC-V or FSM core” (official wording). Small tasks can continue while the main cores sleep; how low a given project’s consumption goes depends on software and board wiring.ESP-IDF v6.1 Get Started — ESP32 / ESP32-S3 chip overview · docs/en/get-started/index.rst

Before you rely on a capability — scope and limits

Modules and boards built on the ESP32-S3

Module variants (flash/PSRAM suffixes) and antenna options live on the module pages; pinouts, revisions and connectors live on the board pages.

Start developing

Common questions this site answers

Sources and evidence

Also known as: ESP32S3, esp32s3